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Doctoral Thesis
DOI
10.11606/T.54.1990.tde-19082014-105911
Document
Author
Full name
Maria Stela Veludo de Paiva
Institute/School/College
Knowledge Area
Date of Defense
Published
São Carlos, 1990
Supervisor
Committee
Slaets, Jan Frans Willem (President)
Moreira, Edson dos Santos
Panepucci, Horacio Carlos
Tannus, Alberto
Traina Junior, Caetano
Title in Portuguese
Projeto de uma arquitetura de hardware para visualização de imagens digitais
Keywords in Portuguese
Processador gráfico
Sistema gráfico
Sistema gráfico com 256 níveis de cinza
Abstract in Portuguese
Neste trabalho são apresentadas a implementação e avaliação da aplicação do processador gráfico TMS34010. O objetivo foi o desenvolvimento de um sistema para visualização de imagens com este processador, a ser integrado ao Tomógrafo por Ressonância Magnética, do Departamento de Física e Ciência dos Materiais. A fim de avaliar tanto os aspectos do "hardware" quanto às capacidades do processador, foram desenvolvidos dois sistemas: um com 16 cores, e outro com 256 níveis de cinza, ambos contendo uma interface serial para interligação de um "mouse" convencional para microcomputadores do tipo PC-AT. Através destes sistemas foram avaliados recursos tais como "pan" horizontal e vertical, divisão da tela ao meio, vídeo no modo entrelaçado, transparência, operações lógicas, e instruções de transferência de blocos de "pixels"
Title in English
Design of a hardware architecture for displaying digital images
Keywords in English
graphics processor
Graphics system
graphics system with gray scale of 256 levels
Abstract in English
This work describes the implementation and evaluation of a TMS34010 graphics processor based system. The system was developed to be used for the visualization of Magnetic Resonance Images in the MR tomography system under development in our Department. To evaluate the design and the performance of the processor, two systems were developed: one capable to show pictures with 16 simultaneous colors, and a second one able to display pictures with a gray scale of 256 levels. Both systems are equipped with a serial interface supporting a conventional mouse as used for PC compatibles. The hardware developed was used to evaluate implementations of resources such as horizontal and vertical PAN, screen division, interlaced video, transparency, logic operations and pixels block transfer routines
 
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Publishing Date
2014-08-21
 
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