A hybrid machine learning approach for inference of asset mid price movements from...

Optimization of cache memory at runtime for embedded processor LEON3

An Ethernet network on configurable DSP chip for applications in FPGA

A tool for generating code from Bluespec SystemVerilog based on finite state machine...

A embedded systems generator from platform independent model based on MARTE prof...

Reduction of losses in distribution systems by network reconfiguration using hardware...

A FAST Hardware Decoder Optimized for Template Features to Obtain Order Book Data...

Lina: a fast design optimisation tool for software-based FPGA programming

Fast Code Exploration for Pipeline Processing in FPGA Accelerators

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